发明名称 |
Circuit arrangement comprising a chain of capacitors |
摘要 |
A circuit arrangement comprises a chain (1) composed of double layer capacitors (2). Modules (3) whose impedance lowers when the voltage across one of the double layer capacitors (2) exceeds a prescribed value are connected parallel to the double layer capacitors (2). As a result thereof, over-voltages at the double layer capacitors (2) are effectively suppressed.
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申请公布号 |
US2003011346(A1) |
申请公布日期 |
2003.01.16 |
申请号 |
US20020203768 |
申请日期 |
2002.08.13 |
申请人 |
STAIB BERND;KAMMERER MICHAEL |
发明人 |
STAIB BERND;KAMMERER MICHAEL |
分类号 |
H02J7/00;H02J7/02;(IPC1-7):H02J1/00 |
主分类号 |
H02J7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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