| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit suitable for inspection which needs a test clock of high clock frequencies; and an inspection method therefor. SOLUTION: A semiconductor integrated circuit 1 comprises a clock control part 5 and a combination circuit part 8. A clock control part 5 comprises a clock generation part 6; a selector 7; and a clock control terminal 13. A clock generation part 6 comprises a PLL 204; flip-flops 205, 206, 207, 208, an AND gate 209, OR gates 210, 211, and an inverter 212. Counting from a point of time when a logical value of a signal input into a clock control terminal 13 is switched to 1, just after a second fall of a pulse output from the PLL 204, a clock generation part 6 is operated to start outputting a clock signal of the PLL 204 from the AND gate 209. Thus, counting from a point of time (T2) when a logical value of a signal input into the clock control terminal 13 is switched to 1, just after a second fall of a pulse output from the PLL 204, a clock control part 5 outputs a clock signal of the PLL 204.
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