| 摘要 |
PURPOSE: To provide a field effect transistor where a distortion Si layer or a distortion SiGe layer is formed on the grid relax SiGe layer and a method for manufacturing this field effect transistor and an integrated circuit device capable of reducing the feedthrough displacement density of the grid relax SiGe layer. CONSTITUTION: This field effect transistor is provided with a substrate 6, an insulating layer 5 formed on the substrate 6, a lattice relaxation SiGe layer 4 formed like an island on the insulating layer 5, a distortion Si layer 3 formed on the lattice relaxation SiGe layer 4, a gate insulating layer 2 formed on the distortion Si layer 3, and a gate electrode 1 formed on the gate insulating layer 2. In this case, a distortion Si layer 3' is positioned on the face within 5 μm from the periphery of the contact face of the lattice relaxation SiGe layer 4 to the insulating layer 5, and the gate insulating layer 2 is formed on this.
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