| 摘要 |
PROBLEM TO BE SOLVED: To perform adjustment of a clock signal at a low cost. SOLUTION: This display device has one or more inverter circuits for adjusting a delay time between an external clock signal input parts T1, T2 for inputting external clock signals CKH1, CKH2, and a sampling signal generating circuit (shift register) on a substrate 10, and selects only a necessary inverter circuit from them, and connects it to delay a sampling timing of a video signal. The connections of the inverter circuits to signal routes can be realized only by altering a connection wiring pattern mask according to the number of the inverters to be connected, without altering the other manufacturing process.
|
