| 摘要 |
Apparatus for detecting synchronisation data in an input serial-bit digital signal formed of a series of word blocks each including a predetermined serial group of m bits forming said synchronisation data, comprises a deserialiser for deserialising the input signal to parallel-bit p-bit words where p<m, a delay for delaying at least p-1 bits of each p-bit word by one p-bit word period, and logic for receiving successive groups of 2p-1 bits each formed of a said p-bit word and the adjacent p-1 bits of the preceding or succeeding word. The logic is arranged to detect an initial portion of said synchronisation data by comparing bit sequences in a said group of 2p-1 bits with the bit sequence at the beginning of said predetermined group of m bits. On detection of said initial portion of the synchronisation data, bits of one or more succeeding groups of 2p-1 bits are compared with succeeding bits of said predetermined m bits in dependence upon the position of said initial portion in the corresponding 2p-1 bits. On detection of all m bits of the synchronisation data, a control signal is generated for controlling alignment of the bits of the words of the input signal in parallel form in dependence upon the position of said initial portion of the synchronisation data in the corresponding 2p-1 bits. |
