发明名称 Semiconductor memory system
摘要 A pulse voltage with its frequency set at approximately 1 MHz and achieving a level of approximately 1V on the high level side and a level of -5~-7V on the low level side is applied to the P-type well 123. When 1V is applied to a P-type well 123, the resulting forward bias causes electrons to be injected from a source 116 and a drain 117 into the channel (P-type well 123) (a). As the voltage applied to the P-type well 123 changes to -5 V, a depletion layer 124 is formed at the channel. At the depletion layer 124, the electrons are accelerated toward a tunnel oxide film 111 (b). The electrons having been accelerated in the channel are injected into the tunnel oxide film 111, are allowed to move inside the tunnel oxide film 111 by the electrical field at the tunnel oxide film 111 and are finally trapped at a floating gate 113. Thus, a semiconductor memory system that makes it possible to reduce the size of the memory cells, prevents erroneous data write/read and achieves a reduction in power consumption is provided.
申请公布号 US6507521(B2) 申请公布日期 2003.01.14
申请号 US20020136281 申请日期 2002.05.02
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 KURACHI IKUO
分类号 G11C16/04;G11C16/12;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/04 主分类号 G11C16/04
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