发明名称 FREQUENCY MULTIPLIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To solve problems of a conventional frequency multiplier circuit that has complicated the circuit configuration because of employing many components such as resistors and capacitors to obtain a multiplied signal of a high-order resulting in causing difficulty in downsizing and especially circuit integration and cannot have accurately determined the duty ratio because of existence in dispersion in the resistance of the resistor and the capacitance of the capacitors depending on each component. SOLUTION: The frequency multiplier circuit of this invention is provided with a duty ratio variable means having a circuit to receive a signal and set the duty ratio of this signal to a desirable value and of a filter means that selectively extracts a desired multiple frequency signal from the signal outputted from the duty ratio variable means.
申请公布号 JP2003008405(A) 申请公布日期 2003.01.10
申请号 JP20010189305 申请日期 2001.06.22
申请人 KINSEKI LTD 发明人 KONO SHUICHI;MIYAZAKI SHIGEYUKI
分类号 H03K5/00;H03B19/14;(IPC1-7):H03K5/00 主分类号 H03K5/00
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