发明名称 RECEPTION CIRCUIT AND RECEIVER FOR DIGITAL BROADCAST
摘要 PROBLEM TO BE SOLVED: To provide a digital broadcast reception circuit capable of getting a best reception grade by controlling (compensating) amplitude and shift of IQ(In-phase, Quadrature) detector circuit based on the reception grade after digital demodulation. SOLUTION: A digital broadcast reception circuit is equipped with IQ detection circuits (9, 21) and (10, 22), which conduct quadrature detection for digitally- modulated high frequency signals, and a demodulation unit 23, which digitalizes and demodulates digitally the detection output of the IQ detection circuit. A control unit 19 is characterized in that it comprises a reception grade detection means, which detects a reception grade using signals from the demodulation unit 23, and a correction means, which corrects either or both of an amplitude error and a phase error of IQ signals between the IQ detection circuit and the input of an A/D converter unit 13 of the demodulation unit 23 based on the detected result of the reception grade detection means. Specifically, it is realized by conducting reception grade detection at the demodulation unit 23 and conducting amplitude or phase correction control for I signal or Q signal at a first low-pass filter 21 or a second low-pass filter 22, as well as a phase shifter 11.
申请公布号 JP2003008674(A) 申请公布日期 2003.01.10
申请号 JP20010193421 申请日期 2001.06.26
申请人 TOSHIBA CORP 发明人 SUZUKI SHINOBU
分类号 H04N5/455;H04B1/16;H04L27/227;H04L27/38 主分类号 H04N5/455
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