| 摘要 |
PURPOSE: An alignment mark of a semiconductor device and a method for fabricating an overlay accuracy measurement mark are provided to improve reliability of the semiconductor device by maintaining a state of stepped portion after performing a tungsten deposition process, a CMP process, and a metal wiring formation process. CONSTITUTION: A field oxide layer(12) is formed on a mark formation region of a semiconductor substrate(10). A nitride layer(14) as an etch barrier is formed on the field oxide layer(12). An interlayer dielectric(16) is formed on an entire surface of the semiconductor substrate(10) after a MOS process is performed. The interlayer dielectric(16) is planarized. An alignment mark and an outline pattern of an overlay accuracy measurement mark are formed by removing sequentially the interlayer dielectric(16), the nitride layer(14), and the field oxide layer(12). A tungsten layer(18) is formed on the inside of a stepped portion by depositing tungsten thereon and performing a CMP process. The first internal pattern is formed on the inside of the tungsten layer(18). A metal wire(20) and the second internal pattern(21) are formed thereon.
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