发明名称 METHOD FOR FABRICATING TUNGSTEN BITLINE
摘要 PURPOSE: A method for fabricating a tungsten bitline is provided to decrease a dopant loss and improve contact resistance by forming an undoped electrostatic discharge(ESD) layer after a source/drain region is formed and by performing a bitline process. CONSTITUTION: A gate oxide layer(20) is formed on a semiconductor substrate(10). A gate electrode in which a polysilicon layer, a tungsten nitride layer and a tungsten layer are stacked is formed on the gate oxide layer. A mask insulation layer pattern is stacked on the gate electrode. An insulation layer spacer is formed on the sidewall of the gate electrode. The source/drain region(80) is formed in the semiconductor substrate at both sides of the gate electrode. The undoped ESD layer is formed on the source/drain region. An interlayer dielectric(100) is formed on the semiconductor substrate. The interlayer dielectric on the ESD layer is etched to form a bitline contact. A predetermined thickness of the first and second barrier metal layers is formed on the semiconductor substrate. A rapid thermal process(RTP) is performed. A predetermined thickness of the third barrier metal layer(140) is formed on the semiconductor substrate. A tungsten layer(150) is formed.
申请公布号 KR20030003376(A) 申请公布日期 2003.01.10
申请号 KR20010039113 申请日期 2001.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, SEONG HUI;RYU, CHANG U
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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