| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device, together with its manufacturing method, in which the back bias effect of the semiconductor storage device comprising a charge accumulation layer and a control gate is reduced to improve integration degree, to raise the capacity ratio between a floating gate and a control gate with no increase of an occupied area, resulting in suppressed variation in cell characteristics, depending on manufacturing processes. SOLUTION: The semiconductor storage device comprises a semiconductor substrate and at least one memory cell composed of at least one island-like semiconductor layer 2110 formed by epitaxial growth, a charge accumulation layer formed at a part or the entire of periphery of the side wall of the island- like semiconductor layer, and a control gate. At least one end of the memory cell is electrically insulated from the semiconductor substrate. |
