| 摘要 |
PROBLEM TO BE SOLVED: To provide a data processor for executing instructions by successively reading those instructions according to a sequence capable of reducing the program size by reducing a redundant program code when there is an instruction group in a relation that a source operand and a destination operand are inverted. SOLUTION: There are a first instruction to explicitly designating an instruction to be inverted, and to directly control the execution order of instructions, a second instruction to directly control the execution order of the instructions, and a third instruction to directly control the execution order of the instructions by making a pair with the first or second instruction. Only when the first instruction is decoded, an instruction decoder 50 updates an inversion stage flag 110 in order to invert the data transfer origin and transfer destination, and when the first instruction is decoded, the instruction decoder 50 returns the inversion state flag 110 to the pre-updated original state in order not to invert the data transfer origin and transfer destination.
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