| 摘要 |
PURPOSE: A methods of making a capacitor in a ferroelectric random access memory is provided to achieve 3-D stack structure that maximizes effective surface area of the lower electrode of a capacitor by an ECD(electro-chemical deposition). CONSTITUTION: An sacrificial layer is etched by a wet etching and a lower electrode stack of Pt. The wet etching solution is mixed solution of BOE(buffered oxide etchant) with HF. An MPS growing polysilicon pattern(170a) is removed by a wet etching solution among HF, BOE, H2SO4, NH4F, NH3OH.
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