发明名称 CLAMPING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a clamping circuit having little offset in a DC voltage of an output signal. SOLUTION: According to a clamp pulse and an offset compensation pulse which come in time division, a selector of a switch means 15 is connected to an own selecting end. While a clamp switching pulse having a duplicate period on the offset compensation pulse does not come in, selectors of switch means 7, 9 are connected to a selection end A. While the clamp switching pulse comes in, the selectors of the switch means 7, 9 are connected to a selection end B. While the clamp pulse comes in, a clamp operation is carried out and while the offset compensation pulse comes in, an offset compensation operation is carried out.
申请公布号 JP2003008377(A) 申请公布日期 2003.01.10
申请号 JP20010194467 申请日期 2001.06.27
申请人 TOSHIBA CORP 发明人 HIRAKAWA TAKUYA
分类号 H03G11/00 主分类号 H03G11/00
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