| 摘要 |
<p>PROBLEM TO BE SOLVED: To eliminate restriction of wirings and arrangement of bumps due to the existence of a fuse elements group, in a hybrid semiconductor chip including a logic circuit section and a memory macro section on a same substrate. SOLUTION: In the case of a semiconductor chip having an electrode pad, the fuse elements group is arranged on a region outside an electrode pad array and along any side of the chip, on a chip plane. In the case of a semiconductor chip having no electrode pad but having bumps, it is arranged on a region outside a bump forming region formed above the logic circuit section and the memory macro section and along any side of the chip, on a chip plane.</p> |
