发明名称 |
DMA CONTROLLER AND SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To solve a problem that evaluation of whether or not allocation of a DMA requesting origin is appropriate and whether or not a failure exists in DMA request intervals is very difficult. SOLUTION: This DMA controller 5 is provided with a control part 3 having a mediation circuit to mediate a plurality of channels 2 by selecting any one of a plurality of DMA request signals 1 accepted via the plurality of channels 2 according to priority levels previously allocated to the plurality of channels 2 and a trace buffer 4 to store trace data 11 regarding the selected DMA request. |
申请公布号 |
JP2003006003(A) |
申请公布日期 |
2003.01.10 |
申请号 |
JP20010183658 |
申请日期 |
2001.06.18 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
SAKUKAWA MAMORU |
分类号 |
G06F11/34;G06F11/28;G06F13/28;G06F13/30;(IPC1-7):G06F11/34 |
主分类号 |
G06F11/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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