| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which can improve layout efficiency and prevent the degradation of element characteristics in a layout pattern in which a function circuit group of a semiconductor integrated circuit extends in one direction. SOLUTION: Inter-unit wiring regions IL1P and IL1N are constituted by arranging connecting wiring 11, 12A, 13 and 14, which are in logic circuits CIR11 and CIR12 or between the circuits, in a second region B1P outside of a power supply voltage wiring VCC1 and a reference voltage wiring VSS1. Only an input/output wiring region IOL1 is arranged in a first region A1 between the power supply wiring VCC1 and the reference voltage wiring VSS1. Since the width of the first region A1 is laid out small because of no wiring region connecting units in the first region A1, the length of the connecting wiring between PMOS and NMOS transistor can be small and an area of N well and P well NW1, PW1 can be small and consequently the layout efficiency and the improvement in element characteristics are achieved.
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