| 摘要 |
A plasma display panel that minimizes the power consumption required for driving the PDP is disclosed. A reset pulse of a ramp-down waveform supplied in a reset period goes down to a voltage level higher than a negative scan reference voltage, and is kept for a specified period. Also, a sustain pulse voltage level of a selective erase type sub-field is provided with a voltage level relatively higher than the sustain pulse provided from the selective write type sub-field, or a reset pulse of a ramp-up waveform that goes from a maximum voltage level of the ramp-up waveform down to a ground voltage level or more is supplied to a scan electrode as well as a selective erase scan pulse descends from a predetermined selective erase scan voltage level to the ground level or more. Therefore, the data driving voltage is minimized, and the display state is stabilized.
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