| 摘要 |
A semiconductor integrated circuit device, e.g., a memory cell of SRAM, is formed of a pair of inverters having their input and output points connected crisscross and formed of drive n-channel MISFETs and load p-channel MISFETs. The n-channel MISFETs and p-channel MISFETs have their back gates supplied with the power voltage and ground voltage, respectively. The MISFETs are formed with the formation of a metal silicide layer on the gate electrodes G and source regions (hatched areas) and without the formation of a metal silicide layer on the drain regions, respectively, whereby the leak current of the MISFETs having a voltage difference between the drain regions and wells can be reduced and thus the power consumption can be reduced.
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