发明名称 MEMORY DEVICE AND METHOD FOR REDUCING NUMBER OF INTERCONNECTS
摘要 PURPOSE: A memory device and a method for reducing the number of interconnects is provided to reduce the number of interconnections required between a memory array and an interface circuit using multiplexing and modulating techniques. CONSTITUTION: A plurality of memory layers(22) include a memory array(36), respectively. A plurality of signal modulating circuits(28) are coupled to each of the memory arrays(36). A line reduction circuit(24) is coupled to the each of the plurality of memory layers(22). For reducing the number of interconnections between the memory module(20) and a memory controller, a predetermined electrical signal is applied to predetermined lines of the first and second set, the memory module(20) in the memory array(36) is addressed, and the state of the memory module(20) is enabled. A plurality of addresses of the memory modules(20) are spread through a predetermined frequency spectrum, and an address is transmitted to an interface/control circuit from the memory array(36).
申请公布号 KR20030003054(A) 申请公布日期 2003.01.09
申请号 KR20020036573 申请日期 2002.06.28
申请人 HEWLETT-PACKARD COMPANY 发明人 TAUSSIG CARL
分类号 G11C17/00;G06K19/07;G11C5/06;(IPC1-7):G06F13/00 主分类号 G11C17/00
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