发明名称 METHOD FOR FABRICATING METAL INTERCONNECTION
摘要 PURPOSE: A method for fabricating a metal interconnection is provided to reduce via resistance by increasing a margin of a process for forming a via hole and by making a plug formed of an aluminum layer whose step coverage is better than that of tungsten. CONSTITUTION: A lower structure having the first insulation layer of defining a metal interconnection is prepared. A conductive layer spacer for the metal interconnection is formed on the lower structure at both sides of the first insulation layer. The second insulation layer as an etch protection layer of the first insulation layer is formed on the first insulation layer. A flat interlayer dielectric is formed on the resultant structure including the second insulation layer. The interlayer dielectric is selectively etched to form the via hole while the interlayer dielectric is left only on the first insulation layer. The plug filling the via hole is formed wherein the plug is made of a metal layer whose step coverage is better than that of tungsten.
申请公布号 KR20030002521(A) 申请公布日期 2003.01.09
申请号 KR20010038170 申请日期 2001.06.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHO, YEONG A
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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