发明名称
摘要 PURPOSE: A semiconductor memory device having a self-aligned contact is provided to improve gap-fill capacity of a contact hole between bit lines, by self-aligning an opening for a storage node contact with a spacer after forming the spacer on a sidewall of a bit line pattern. CONSTITUTION: A plurality of gate electrodes are formed in a predetermined direction on a semiconductor substrate(1), separated from each other by a predetermined interval. The first insulating layer is formed on the resultant structure, and has at least the first and second openings exposing an active region of the substrate between the gate electrodes. The first and second conductive pad layers bury the first and second openings, respectively. The first interlayer dielectric(27) is formed on the first insulating layer having the first and second pad layers. A plurality of bit lines(29) are formed on the first interlayer dielectric in a direction perpendicular to the gate electrodes, penetrating the first interlayer dielectric to be electrically connected to the first pad layer. An insulating spacers are formed on both sidewalls of the bit lines. The second interlayer dielectric(35) is formed on the first interlayer dielectric having the bit lines and the insulating spacers. A storage electrode is self-aligned with the insulating spacer between the bit lines, penetrating the second and first interlayer dielectrics to be electrically connected to the second pad layer.
申请公布号 KR100366620(B1) 申请公布日期 2003.01.09
申请号 KR20000033842 申请日期 2000.06.20
申请人 发明人
分类号 H01L27/108 主分类号 H01L27/108
代理机构 代理人
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