发明名称 MEMORY SYSTEM INCLUDING MEMORY CHIP VARYING INPUT RESISTANCE VALUE
摘要 PURPOSE: A memory system including a memory chip varying an input resistance value is provided to vary the input resistance value in order to select an optimal input resistance value according to a load condition of a bus channel. CONSTITUTION: The memory system includes a memory controller(200), the bus channel(205), memory modules(210,220,230,240) and memory slots(250,260,265). The memory modules(210,220,230,240) include a plurality of memory chips. Input resistances(RT1-RTN) commonly connected with a terminal voltage(VT) are selectively connected to an input terminal of the memory chips through switching circuits(215,225,235,245). The memory controller(200) controls the data input/output of the memory chips through the bus channel(205). The memory modules(210,220,230,240) act as the load of the bus channel(205) by installing to the memory slots(250,255,260,265). The first memory module(210) includes the input resistances(RT1-RTN) and the switching circuit(215). The switching circuit(215) selects the optimal input resistance according to the load condition of the bus channel(205).
申请公布号 KR20030002943(A) 申请公布日期 2003.01.09
申请号 KR20010039538 申请日期 2001.07.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JUNG, TAE SEONG;LEE, JAE JUN;PARK, MYEON JU;SO, BYEONG SE
分类号 G06F12/00;(IPC1-7):G06F12/00 主分类号 G06F12/00
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