| 摘要 |
A data processing apparatus (100) varying width data sizes for a data storing device is disclosed. A data processing apparatus (100) may include a data storage circuit (201), a read/write switch circuit (103), an address generating circuit (104), and a selection signal generating circuit (202). A data storage circuit (201) may include at least one memory array (112), a selecting circuit (211 and 212), a read circuit (214) and a write circuit (213). Selecting circuit (211 and 212) may select a plurality of data bits from a memory array (112) in a first mode and may select N times the plurality of data bits from a memory array (112) in a second mode. In this way, a data storage circuit (201) may be shared by, for example, processors having different data widths.
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