| 摘要 |
A method and system for background ECC scrubbing, i.e., checking and correcting scheme, for a memory array are provided which do not affect normal system operation of the memory array and do not add additional time delay to the data flow path, especially a data output flow path. Unlike the prior art, an ECC decoder circuit block is placed outside a critical data output path of a memory array. A data refresh path is provided to periodically pull the data out from the memory array via the ECC decoder circuit block for checking and correcting the data. The outgoing data in response to a read command does not suffer any time delay caused by the ECC checking and correcting scheme, since the data are not read out via the ECC decoder circuit block. Any hard errors are corrected by at least one redundancy circuit.
|
