发明名称 Method and apparatus for a digital clock multiplication circuit
摘要 A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable region. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.
申请公布号 US2003006850(A1) 申请公布日期 2003.01.09
申请号 US20020153427 申请日期 2002.05.21
申请人 THE NATIONAL UNIVERSITY OF SINGAPORE 发明人 LYE KIN MUN;JOE JURIANTO
分类号 H03K5/00;(IPC1-7):H03L7/00 主分类号 H03K5/00
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