| 摘要 |
PURPOSE: A combi card is provided to synchronize a data timing signal, output according to a CPU clock, with a BPSK(Binary Phase Shift Key) clock of an AFE(Analogue Front End) block so that it can prevent an access of the card to a reader from being delayed. CONSTITUTION: The combi card comprises a CPU(120), a buffer delay circuit(160) and an AFE block(140). The CPU(120) controls the operation of overall circuits for a data IO according as the smart card is a contact type or a contactless type. The AFE block(140) includes a BPSK modulator(150) which receives the control signal and the data signal, and modulates the received signal into a clock signal operated as a BPSK. The buffer delay circuit(160) synchronizes the data, transmitted from the CPU(120), with the clock frequency of the BPSK modulator(150), and transmits the synchronized data to an interface for interfacing the smart card with an external device, like a reader(200).
|
