发明名称 |
REGISTER CONTROL DELAY LOCKED LOOP AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME |
摘要 |
<p>PURPOSE: A register control delay locked loop and a semiconductor device provided with the same are provided to minimize an unnecessary power consumption and contribute to developing a low power device. CONSTITUTION: A semiconductor device provided with a register control delay locked loop and an inner circuit for utilizing a DLL clock includes a DLL clock enable signal generator(53) for generating a DLL clock enable signal(dll_en) to enable/disenable the DLL clock applied to the inner circuit in response to an activation information and a non-activation information for the semiconductor device.</p> |
申请公布号 |
KR20030002131(A) |
申请公布日期 |
2003.01.08 |
申请号 |
KR20010038872 |
申请日期 |
2001.06.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
KWON, GI SEOP;LEE, SEONG HUN |
分类号 |
G06F1/10;G11C7/22;G11C11/407;G11C11/4076;H03K5/00;H03K5/13;H03L7/08;H03L7/081;(IPC1-7):G11C11/407 |
主分类号 |
G06F1/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|