发明名称 METHOD FOR FORMING METAL INTERCONNECTION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A metal interconnection formation method of semiconductor devices is provided to reduce a contact resistance by filling a contact hole using a polysilicon layer having a high step-coverage. CONSTITUTION: An interlayer dielectric(12) is deposited on a silicon substrate(10). A contact hole(14) is formed by selectively etching the interlayer dielectric(12). A polysilicon layer(20) having a hole(22) is partially filled into the contact hole(14), wherein the polysilicon layer(20) has a relatively high step-coverage compared to a conventional metal film. Then, a metal film is entirely filled into the contact hole(14). By annealing the resultant structure so as to react the polysilicon layer(20) and the metal film, a metal silicide layer is formed.
申请公布号 KR20030001860(A) 申请公布日期 2003.01.08
申请号 KR20010037718 申请日期 2001.06.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KWON, TAE SEOK
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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