| 摘要 |
PURPOSE: A method for fabricating a merged DRAM with logic(MDL) semiconductor device is provided to prevent a gate oxide layer from being deteriorated by photoresist, by forming thick and thin gate oxide layers, respectively. CONSTITUTION: A logic gate oxide layer and a conductive layer pattern for a logic gate are formed in a region for a logic device region(1000). A DRAM gate oxide layer, a DRAM gate electrode and a mask insulation layer pattern are formed in a region for a DRAM device region(2000). A DRAM source/drain region(70) is formed in a substrate(10) at both sides of the DRAM gate electrode. The conductive pattern for the logic gate is patterned to form a logic gate electrode. A lightly-doped-drain(LDD) region(90) is formed in the substrate at both sides of the logic gate. A blocking insulation layer and a planarization layer are formed. The planarization layer on the DRAM source/drain region is removed. An exposed blocking insulation layer is anisotropically etched to form a spacer and a contact hole exposing the DRAM source/drain region is exposed. A contact plug filling the contact hole is formed. The planarization layer on the logic device region is removed. The blocking insulation layer on the logic device region is anisotropically etched to form a spacer on the sidewall of the logic gate electrode. A logic device source/drain region is formed in the LDD region at both sides of the logic gate electrode. A silicide layer(150) is formed on the logic gate electrode and the logic source/drain region.
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