| 摘要 |
PURPOSE: A fabrication method of a CMOS(Complementary Metal Oxide Semiconductor) is provided to easily control threshold voltage of each MOS and to prevent the lateral diffusion of boron by using different material as gate electrodes for NMOS between a cell and peripheral region. CONSTITUTION: The first region(I) for NMOS of a cell region and PMOS for a peripheral region and the second region(II) for NMOS of the peripheral region are defined in a substrate(51). The first gate oxide(53), a doped polysilicon layer(55) and the first metal film(57) are sequentially formed on the resultant structure, thereby forming NMOS and PMOS having the first gate patterns. An interlayer dielectric(63) is formed between the stacked gate patterns. After selectively removing the metal film(57), the doped polysilicon layer(55) and the first gate oxide(53) of the first region(I), the second oxide(67) grows on the exposed substrate(51) of the first region(I). Then, the second gate pattern including the second metal film(69) and the third metal film(71) is formed on the first region(I).
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