发明名称 |
METHOD FOR FABRICATING VIA HOLE THROUGH DUAL DAMASCENE PROCESS |
摘要 |
PURPOSE: A method for fabricating a via hole through a dual damascene process is provided to control an increase in via resistance by easily eliminating a photoresist layer hardened in a via first method. CONSTITUTION: The first interlayer dielectric(33) and the second interlayer dielectric(35) are sequentially formed on the first metal interconnection. The first and second interlayer dielectrics are selectively etched to form a via hole(39) exposing the first metal interconnection. An organic anti-reflective layer is formed on the second interlayer dielectric to fill the bottom of the via hole. A trench mask(41) using a photoresist layer is formed on the organic anti-reflective layer. The organic anti-reflective layer and the second interlayer dielectric are etched by using the trench mask to form a trench on the via hole. The first plasma treatment process is performed to eliminate a hardened material remaining on the bottom of the via hole. The second plasma treatment process is performed to strip the trench mask.
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申请公布号 |
KR20030002119(A) |
申请公布日期 |
2003.01.08 |
申请号 |
KR20010038860 |
申请日期 |
2001.06.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
KIM, SANG IK;LEE, SEONG GWON |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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