| 摘要 |
PURPOSE: A memory device regardless of an influence of noise is provided to reduce an influence from a peripheral bit line in a reading or a writing process of data of a memory cell. CONSTITUTION: An equalizer control portion(200) generates the first equalizer signal(EQ1) and the second equalizer signal(EQ2) in response to an output of a pre-decoder. A pre-charge portion(300) performs a sensing operation for a memory cell selected from memory cells connected with a positive bit line(BL) and a negative bit line(/BL) in response to the first equalizer signal(EQ1) and the second equalizer signal(EQ2) generated from the equalizer control portion(200). In addition, the pre-charge portion(300) maintains precharge states of the remaining memory cells. An equalizer portion(400) equalizes electric potential of the positive bit line(BL) with the electric potential of the negative bit line(/BL) in response to the first equalizer signal(EQ1) and the second equalizer signal(EQ2). An amplification circuit portion(500) amplifies a potential difference between the positive bit line(BL) and the negative bit line(/BL).
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