发明名称 METHOD FOR FORMING TRENCH ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A trench isolation layer formation method of semiconductor devices is provided to prevent a degradation of a gate oxide layer and residues by removing a moat generated at edge portions of an active region. CONSTITUTION: A trench mask pattern including a pad oxide layer(24) and a polish stopping layer(26) made of nitride is formed on a silicon substrate(20). A trench is formed by etching the exposed silicon substrate using the trench mask pattern. An insulating layer for filling the trench is formed on the resultant structure. A trench isolation layer(22) is formed to expose the polish stopping layer(26) by planarizing the insulating layer using a CMP(Chemical Mechanical Polishing). The polish stopping layer(26) is wet-etched and the remaining polish stopping layer(26) is removed by an anisotropic etching.
申请公布号 KR20030002055(A) 申请公布日期 2003.01.08
申请号 KR20010038791 申请日期 2001.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, GWANG OK
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址