| 摘要 |
PROBLEM TO BE SOLVED: To provide a tester for a semiconductor integrated circuit capable of reducing the consumption power at a time when a judgement result of good or bad of an object to be tested is written into a memory. SOLUTION: Fail data FD is input to D-flipflops 11, 12, and address data AD is input to D-flipflops 13, 14. Signals S11, S12 output from the D-flipflops 11, 12 are supplied to data input terminals of fail memories 30, 31, respectively through NAND circuits 17, 18, and signals S21, S22 output from the D-flipflops 13, 14 are supplied to data input terminals of the fail memories 30, 31, respectively through the NAND circuits 17, 18. The circuit consisting of the D-flipflop 11 and the NAND circuit 21, and the circuit consisting of the D-flipflop 12 and the NAND circuit 22 judge the presence or absence of the fail data and operate the fail memories 30, 31.
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