发明名称 Semiconductor memory device with memory test circuit
摘要 A semiconductor memory device includes a plurality of array blocks including word lines, memory cells, bit lines, dummy word lines and transistors. In a test mode, rather than a word line a dummy word line is selected. Selectively turning on either one of the transistors allows a bit line connected thereto to be driven to a ground potential. Thus, a channel leak can be detected. In a mode other than the test mode, a defective word line is substituted by a spare word line included in a spare block.
申请公布号 US6504744(B2) 申请公布日期 2003.01.07
申请号 US20000736501 申请日期 2000.12.15
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ARITOMI KENGO;ASAKURA MIKIO
分类号 G06F12/16;G11C11/401;G11C29/04;G11C29/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G11C5/06 主分类号 G06F12/16
代理机构 代理人
主权项
地址