| 摘要 |
A content addressable memory that may have reduced charge consumption when switching compare lines is disclosed. According to one embodiment, a content addressable memory (CAM) (300) with paired compare lines (CMP and CMP/) can include an equalization circuit (320) between the two compare lines (CMP and CMP/). An equalization circuit (320) can enter a low-impedance mode when an equalization control signal (EQU/) is in one state and enter a high-impedance mode when an equalization control signal (EQU/) is in another state. An equalization control signal (EQU/) may be governed by an output pulse of a transition detector (312).
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