| 摘要 |
A system and method for performing an inverse discrete cosine transform (IDCT) based on DCT data is disclosed. The system is IEEE compliant and transforms one block (8x8) of pixels in 64 cycles. The IDCT processor receives the DCT input, produces the matrix (QXTQ)P, or XQP, in IDCT Stage 1 and stores the result in transpose RAM. IDCT Stage 2 performs the transpose of the result of IDCT Stage 1 and multiplies the result by P, completing the IDCT process and producing the IDCT output. The system performs the matrix function QXtQ, where X represents the DCT data and Q is a predetermined diagonal matrix. The resultant value is adjusted by discarding selected bits, and the system then postmultiplies this with the elements of a predetermined P matrix, and discards selected bits. The system performs a conversion and storing function and performs a sign change to obtain QXtQP. This completes first stage processing, which is then passed to transpose RAM. The system then initiates IDCT stage 2, and performs a matrix transpose of QXtQP, yielding (QXtQP)t. The system converts and clips data, and postmultiplies the result by the P matrix. Another conversion is performed, a buffer addition performed, and a sign switch occurs to obtain the elements of (QXtQP)tP. The system then right shifts the data seven bits, with roundoff, and not a clipping, and then truncates the result to between -256 and 255.
|
