发明名称 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit
摘要 In a level conversion circuit mounted in an integrated circuit device using a plurality of high- and low-voltage power supplies, the input to the differential inputs are provided. In a level-down circuit, MOS transistors that are not supplied with 3.3 V between the gate and drain and between the gate and source use a thin oxide layer. In a level-up circuit, a logic operation function is provided.
申请公布号 US6504400(B2) 申请公布日期 2003.01.07
申请号 US20020122178 申请日期 2002.04.16
申请人 发明人
分类号 H01L21/8234;H01L27/088;H03K3/356;H03K19/0175;H03K19/0185;(IPC1-7):H03K19/017 主分类号 H01L21/8234
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