发明名称 |
Method of reducing planarization defects |
摘要 |
A method of reducing the planarization defects produced during the manufacture of semiconductor devices. A sacrificial layer, having defects produced during a interconnection feature planarization step, is removed prior to the formation of subsequent layers to reduce the replication of unwanted defects.
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申请公布号 |
US6503827(B1) |
申请公布日期 |
2003.01.07 |
申请号 |
US20000605806 |
申请日期 |
2000.06.28 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BOMBARDIER SUSAN G.;FEENEY PAUL M.;GEFFKEN ROBERT M.;HORAK DAVID V.;RUTTEN MATTHEW J. |
分类号 |
H01L21/768;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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