| 摘要 |
PURPOSE: A phase interpolation circuit is provided to control a current source of a phase mixing portion through a bit switch by generating the amount of full scale current from a bias generation portion. CONSTITUTION: A bias generation portion(100) generates bias current. A bit switching portion(200) is enabled by a bias signal(bias) generated from the bias generation portion(100). The bit switching portion(200) outputs analog signals(lout,loutb) to nodes(Nd15,Nd16). A current path to a ground node is determined by the analog signals(lout,loutb) of the nodes(Nd15,Nd16). A phase mixing portion(400) received the first input signal and the first input bar signal(InE,InEb) and the second input signal and the second input bar signal(InO,InOb) and generates phase-interpolated signals(out,outb) to nodes(Nd13,Nd14). The bias generation portion(100) is formed with a bias generation terminal(22) and PMOS transistors(P11,P12), The bit switching portion(200) is formed with NMOS transistors(N30 to Nn) of n number and transfer gates(G11-Gn) of N/2 number. The phase mixing portion(400) is formed with resistances(R11,R22) and NMOS transistors(N88,N99,N110,N140).
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