| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to form a photoresist layer pattern whose etch tolerance is improved, by performing a bake process after polymer solution including radical initiator is applied on a photoresist layer pattern in a self-align dual damascene process. CONSTITUTION: The first interlayer dielectric(11) is formed on a semiconductor substrate(10). A lower metal interconnection(13) is formed on the first interlayer dielectric. The second interlayer dielectric(15) is formed on the resultant structure. The first photoresist layer pattern exposing a portion reserved for a via contact is formed on the second interlayer dielectric. Water-soluble polymer solution containing radial initiator is applied on the resultant structure. The radical initiator in the water-soluble polymer solution is diffused to the first photoresist layer pattern by a bake process. The water-soluble polymer solution is removed. The second photoresist layer pattern exposing a portion reserved for an upper metal interconnection is formed on the resultant structure. The second interlayer dielectric is etched to form a via contact hole by using the first and second photoresist layer patterns as an etch mask. The first photoresist layer pattern is etched by using the second photoresist layer pattern as an etch mask. The second photoresist layer pattern is removed. The second interlayer dielectric is etched to form a trench by using the first photoresist layer pattern as an etch mask. The first photoresist layer pattern is eliminated.
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