发明名称 METHOD FOR FORMING DUAL DAMASCENE WIRING
摘要 PURPOSE: A fabrication method of dual damascene wiring is provided to easily achieve fine patterns and to easily control the size of a via hole or a trench by using a plurality of metal hard mask having different etching selectivity. CONSTITUTION: A diffusion barrier layer(34), an interlayer dielectric(35), a first metal hard mask(36) are sequentially formed on a semiconductor substrate(31) having a lower metal wiring(33). A desired portion of the first metal hard mask is partially etched to form a trench pattern by using a first photoresist pattern. A second metal hard mask having different etching selectivity is formed on the etched region of the first metal hard mask. A via hole pattern is formed by selectively etching the first metal hard mask using a second photoresist pattern. The interlayer dielectric is partially etched to form a via hole pattern by using the first metal hard mask. After removing the exposed first metal hard mask, a trench and a via hole are formed by selectively etching the interlayer dielectric using the second metal hard mask.
申请公布号 KR20030000820(A) 申请公布日期 2003.01.06
申请号 KR20010036969 申请日期 2001.06.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HONG, EUN SEOK
分类号 H01L21/28;H01L21/768;(IPC1-7):H01L21/28 主分类号 H01L21/28
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