发明名称 ADDRESS BUFFER CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: An address buffer circuit of a semiconductor memory device is provided to operate stably a sense amplifier by removing noise applied to an input terminal without loss of time due to timing delay. CONSTITUTION: The first and the second PMOS transistors(P11,P12) are connected serially between a voltage supply line and a node(Nd12) in order to supply a supply voltage(Vcc) to the node(Nd12). The third PMOS transistor(P13) is connected between the node(Nd12) and a node(Nd13) in order to transfer a signal of the node(Nd12) to the node(Nd13). The first NMOS transistor(N11) is connected between the node(Nd13) and a node(Nd14) in order to transfer a signal of the node(Nd13) to the node(Nd14). The second NMOS transistor(N12) is connected between the node(Nd14) and a ground voltage node in order to transfer a signal of the node(Nd13) to the node(Nd14). The third and the fourth NMOS transistors(N13,N14) are connected between the node(Nd13) and the ground voltage node. The fourth PMOS transistor(P14) drops a voltage of the node(Nd13) below a threshold voltage. The fifth NMOS transistor(N15) boosts the voltage of the node(Nd13) to the threshold voltage. An inverter(INV11) receives a signal from the node(Nd13) and outputs an inverted signal to a node(Nd15).
申请公布号 KR20030000606(A) 申请公布日期 2003.01.06
申请号 KR20010036643 申请日期 2001.06.26
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JANG, GYEONG SIK
分类号 G11C8/06;(IPC1-7):G11C8/06 主分类号 G11C8/06
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