发明名称 PLD architecture for flexible placement of IP function blocks
摘要 <p>In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block. <IMAGE></p>
申请公布号 EP1271784(A2) 申请公布日期 2003.01.02
申请号 EP20020252557 申请日期 2002.04.10
申请人 ALTERA CORPORATION 发明人 LEE, ANDY L.;MCCLINTOCK, CAMERON;JOHNSON, BRIAN;CLIFF, RICHARD;REDDY, SRINIVAS;LANE, CHRIS;LEVENTIS, PAUL;BETZ, VAUGHN TIMOTHY;LEWIS, DAVID
分类号 H01L21/82;H03K19/173;H03K19/177;(IPC1-7):H03K19/177 主分类号 H01L21/82
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