发明名称 Area efficient waveform evaluation and DC offset cancellation circuits
摘要 Analog circuits for providing one or more waveform parameters, e.g., the DC offset or average, of an analog input signal. Separate biasing is not necessarily required. Some embodiments comprise field-effect-transistors (FETs) configured in various diode-connected configurations that take advantage of leakage currents through the FETs so that long resistors or large capacitors are not necessarily required. One embodiment comprises two diode-connected FETs to provide an unbiased DC offset voltage of an analog input signal.
申请公布号 US2003001654(A1) 申请公布日期 2003.01.02
申请号 US20020118816 申请日期 2002.04.08
申请人 SOUMYANATH KRISHNAMURTHY;FRANCA-NETO LUIZ 发明人 SOUMYANATH KRISHNAMURTHY;FRANCA-NETO LUIZ
分类号 G01R19/02;G01R19/04;H03F1/30;H03L7/089;H03L7/093;H03L7/183;H03L7/23;(IPC1-7):H03L5/00 主分类号 G01R19/02
代理机构 代理人
主权项
地址