| 摘要 |
The present invention enables to design a semiconductor integrated circuit with a small chip area and the number of wiring layers at a low cost for a short time. In the present design method of the semiconductor integrated circuit, a first wiring group (a horizontal power wiring and horizontal ground wirings) and a second wiring group (a horizontal power wiring and horizontal ground wirings), which are opposite to each other, are arranged at the outside of a macro outer frame, a third wiring group (a vertical power wiring and a vertical ground wring) is arranged to correspond to a power terminal and a ground terminal on a macro cell, and these first and second wiring groups are connected to the power terminal and the ground terminal by the third wiring group.
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