发明名称 Memory management apparatus and method
摘要 Cache memory systems, microprocessors, and computer systems, as well as methods of operating a cache memory system are described. The cache memory system includes a cache memory controller coupled to a dynamic cache memory and a static cache memory. The cache memory system provides the advantages of using dynamic memory (having a small circuit real estate requirement) for cache read operations, and static memory for cache write operations. Using the static memory for cache write operations allows the cache memory system to function as a write-back cache, instead of an instruction-only, or write-through cache.
申请公布号 US2003005226(A1) 申请公布日期 2003.01.02
申请号 US20010896597 申请日期 2001.06.29
申请人 INTEL CORPORATION 发明人 HONG JOSEPH N.
分类号 G06F12/08;(IPC1-7):G06F13/00 主分类号 G06F12/08
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