Delay compensation circuit including a feedback loop

摘要

A delay compensation circuit that determines the effects of process, voltage, and temperature (PVT) conditions of a chip by amplifying the maximum delay time of a delay element within the chip. The delay compensation circuit determines into which one of several predefined time intervals the amplified delay time falls, where each predefined time interval is associated with different PVT conditions. The delay compensation circuit of the present invention can be used to generate control signals for a variable delay element. Also, the PVT information provided by the delay compensation circuit can be used to design components within a chip to compensate for variances in PVT conditions. The feedback loop structure of the delay compensation device reduces the required chip area and power consumption of the delay compensation circuit.