发明名称 Integrated memory circuit and method for reading a data item from a memory cell
摘要 An integrated memory circuit includes a memory cell addressed through a first word line and read through a first bit line. The first word line is connected to a word line control circuit for activating, based upon an address, a first word line associated with the memory cell to be read. A data item stored in the addressable memory cell is read through the first bit line using a read apparatus, in particular, a sense amplifier. A second word line is provided to connect a capacitance element to a second bit line, the second bit line being adjacent to the first bit line. The word line control circuit is adapted to connect the capacitance element to the second bit line using the second word line substantially simultaneously with activation of the first word line. A method for reading the data item is also provided.
申请公布号 US2003002351(A1) 申请公布日期 2003.01.02
申请号 US20020178646 申请日期 2002.06.24
申请人 BEER PETER;BENZINGER HERBERT;GRUBER ARNDT;STIEF REIDAR 发明人 BEER PETER;BENZINGER HERBERT;GRUBER ARNDT;STIEF REIDAR
分类号 G11C7/18;G11C11/408;G11C11/4097;(IPC1-7):G11C5/00 主分类号 G11C7/18
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